analyze -vhdl /chalmers/users/dhapar/hdv_psl_exam/trunk/src/fifo.vhd
analyze -vhdl -psl /chalmers/users/dhapar/hdv_psl_exam/trunk/src/fifo_properties.psl

elaborate -vhdl -parameter width 4 -parameter length 4 -top fifo(behavioral)

clock clk
